
A low‐power fast‐switching write‐and‐standby shared assist circuit for low‐voltage SRAMs
Author(s) -
Wang JinnShyan,
Liu ChienTung,
Liu ZhiRong,
Wang ShaoZhi,
Kang JyunJiea
Publication year - 2022
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/ell2.12422
Subject(s) - standby power , static random access memory , power (physics) , voltage , low voltage , computer science , power consumption , electrical engineering , reduction (mathematics) , low power electronics , electronic engineering , embedded system , engineering , computer hardware , physics , geometry , mathematics , quantum mechanics
Assist circuitry helps the SRAM to lower the supply voltage VDD to reduce power consumption. Separately designed read, write, and standby assists for low voltage (LV) are not area‐ and power‐efficient. This paper proposes a fast‐switching VDD‐lowering circuit without inducing direct current to achieve a single low‐power write‐and‐standby shared assist circuit. Experimental results verify that the proposed assist can achieve significant power reduction no matter in the write or the standby modes.