Open AccessSpike‐driven gated recurrent neural network processor for electrocardiogram arrhythmias detection realised in 55‐nm CMOS technology
Author(s) -
Wu Yuancong,
Liu Y.H.,
Liu Shuang,
Yu Q.,
Chen T.P.,
Liu Y.
Publication year - 2020
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2020.2224
Subject(s) - cmos , computer science , chip , asynchronous communication , artificial neural network , spike (software development) , electronic engineering , logic gate , computer hardware , electrical engineering , engineering , artificial intelligence , telecommunications , algorithm , software engineering
In this Letter, an asynchronous spike‐driven processor based on gated recurrent neural network algorithm for electrocardiogram (ECG) cardiac arrhythmias detection has been designed. Based on the processor, the proposed ECG detection model, containing a many‐to‐many gated recurrent unit layer and a fully connected layer, can achieve a high classification overall accuracy of 97.8% using the MIT‐BIH arrhythmia database. The processor was fabricated in 55‐nm 1P6M CMOS technology. It integrates about 1.4 million logic gates, including 40 KB of on‐chip memory within a 4.0mm 2 die area. The test chip consumes 6.28 mW at real‐time operation frequency (200 MHz) with 1.2 V core supply voltage and 2.65μ W at 1 kHz.