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FPGA‐based parallel process for Walsh–Hadamard transform
Author(s) -
ReynosoGodinez R.,
RodriguezDonate C.,
LopezRamirez M.,
GarciaGuevara F.M.
Publication year - 2020
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2020.1773
Subject(s) - hadamard transform , field programmable gate array , process (computing) , computer science , walsh function , parallel computing , arithmetic , embedded system , algorithm , mathematics , programming language , mathematical analysis
A field‐programmable gate array‐based reconfigurable parallel computing unit to calculate the Walsh–Hadamard transform is proposed. The architecture can process long‐duration signals with a large number of samples. Obtained results demonstrate its versatility and usefulness in applications requiring online digital signal processing, utilising few resources in low‐cost devises as Cyclone II 2C20 and Cyclone IV EP4CE22.

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