Open Access1200 V buried gate fin p‐body IGBT with ultralow on‐state voltage and good short circuit capability
Author(s) -
Lu Jiang,
Liu Jiawei,
Tian Xiaoli,
Chen Hong,
Bai Yun,
Liang Fei,
Liu Xinyu
Publication year - 2020
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2020.1391
Subject(s) - insulated gate bipolar transistor , fin , materials science , optoelectronics , voltage drop , fabrication , electrical engineering , voltage , common emitter , bipolar junction transistor , junction temperature , transistor , engineering , physics , power (physics) , composite material , medicine , alternative medicine , pathology , quantum mechanics
A buried gate fin p‐body insulated gate bipolar transistor (BG‐Fin‐P IGBT) is proposed to achieve ultralow on‐state voltage drop ( V CE(sat) ) and good short‐circuit (SC) ruggedness simultaneously. A buried gate is introduced at the bottom part of the fin structure, forming a local region with the nanoscale mesa width, which enhances the conductivity modulation effectively. Meanwhile, a relatively wide mesa width (>0.5 μm) can be adopted at the main fin structure to maintain a good SC capability. Compared to the previously reported ultra‐narrow‐mesas fin p‐body IGBT, simulation results reveal that the V CE(sat) of the BG‐Fin‐P IGBT is reduced from 1.39 to 1.03 V at the current density of 100 A/cm 2 without SC ability degradation. Meanwhile, more than 10 μs short circuit withstand time is enabled at the junction temperature of 423 K for all structures. Moreover, the proposed structure can avoid a fabrication difficulty of the emitter contact when a very narrow mesa width (∼30 nm) is required to achieve the ultralow V CE(sat) , which brings design freedom on the device's structure.