Open AccessHybrid low‐ k spacer scheme for advanced FinFET technology parasitic capacitance reduction
Author(s) -
Gu M.,
Wang X.,
Li W.,
Aquilino M.,
Peng J.,
Wang H.,
Jaeger D.,
Tabakman K.,
Carter R.,
Hu O.,
Ma W.,
Joshi M.,
Lee L.
Publication year - 2020
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2019.3954
Subject(s) - capacitance , materials science , dielectric , ring oscillator , optoelectronics , parasitic capacitance , high κ dielectric , electronic engineering , reduction (mathematics) , electrical engineering , electrode , cmos , engineering , physics , quantum mechanics , geometry , mathematics
Low‐dielectric constant (low‐ k ) material is critical for advanced FinFET technology parasitic capacitance reduction to enable low‐power and high‐performance applications. Silicon Oxycarbonnitride (SiOCN) is one of the most promising low‐ k materials for FinFET gate sidewall spacer. The k value of SiOCN can be controlled in the range of 4.1–5.2 by modifying the chemical contents during the deposition process. However, the integration of SiOCN with k value lower than 5.2 for advanced FinFET technology faces substantial challenges associated with the material damage from subsequent manufacturing processes. Here, the authors demonstrate a hybrid low‐ k spacer scheme on a fully integrated 7 nm FinFET technology platform, in which SiOCN with k value of 4.5 was successfully integrated along the sidewalls of the gate electrode as spacer while retaining the structural integrity and dielectric properties. Device characterisation on the hybrid low‐ k spacer scheme ( k = 4.5) demonstrated 12/11% reduction in P/NFET overlap capacitance ( C OV ) and 3% reduction in ring oscillator effective capacitance ( C EFF ) in comparison to the baseline reference using SiOCN with k value of 5.2 as spacer. Furthermore, reliability characterisation confirmed the dielectric breakdown voltage ( V BD ) and leakage current ( I LKG ) of the hybrid low‐ k spacer ( k = 4.5) were comparable to the baseline reference ( k = 5.2), meeting the technology requirements.