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Mix‐mode forward‐biased diode with low clamping voltage for robust ESD applications
Author(s) -
Qi Zhao,
Qiao Ming,
Liang Longfei,
Li Zhaoji,
Zhang Bo
Publication year - 2020
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2019.3608
Subject(s) - electrostatic discharge , diode , materials science , optoelectronics , diffusion capacitance , anode , capacitance , clamping , clamper , voltage , transistor , footprint , electrical engineering , parasitic capacitance , engineering , electrode , physics , mechanical engineering , paleontology , quantum mechanics , biology
The forward‐biased diode has been widely applied in electrostatic discharge (ESD) protection projects. In this Letter, various diodes with finger‐shaped topology are studied by transmission line pulse (TLP) and emission microscope (EMMI) experiments. Among them, a novel mix‐mode diode with P‐well and floating deep N‐well, called MMDIO, is fabricated by the same process and footprint, except that some discrete N + regions are being added to the original anode P + region. This approach forms a combination of a parasitic NPN transistor and a PNPN structure, which can significantly optimise the ESD current efficiency and clamping voltage ( V CL ). According to the comprehensive comparison, the MMDIO with overlapped anode N + layout could endure the failure current 1.25 times higher than that of a regular diode under the same junction capacitance ( C j ), while the V CL is reduced by 20%. Accordingly, the MMDIO is an attractive solution to pass the higher ESD level without any negative influence.

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