Open AccessStretched tunnelling body contact structure for suppressing the FBE in a vertical cell DRAM
Author(s) -
Cho Y.S.,
Choi P.H.,
Kim K.H.,
Park J.M.,
Hwang Y.S.,
Hong H.S.,
Lee K.P.,
Choi B.D.
Publication year - 2019
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2019.2541
Subject(s) - dram , quantum tunnelling , materials science , optoelectronics , transistor , dynamic random access memory , current (fluid) , diode , layer (electronics) , random access memory , chip , electrical engineering , condensed matter physics , nanotechnology , physics , engineering , computer science , voltage , semiconductor memory , computer hardware
Vertical cell transistor is necessary to drastically reduce the chip size of the dynamic random access memory. This structure has a great advantage in terms of shrinkage, but it also has the disadvantage of increasing the OFF‐state current by causing floating body effect (FBE). For the first time, it is demonstrated that a stretched tunnelling diode, which consists of a p + layer next to the n + active layer in the buried body, leads to a drastically suppressed FBE. The OFF‐state current is sharply reduced by about seven orders compared with a conventional structure. Furthermore, the decrease in the OFF‐state current is at minimum when the length of the stretched p + region is approximately half the channel length ( L p / L =1/2).