Open AccessBalanced sampling switch for high linearity and a wide temperature range in low power SAR ADCs
Author(s) -
Kim J.E.,
Yoo T.,
Baek K.H.,
Kim T.T.H.
Publication year - 2019
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2019.2533
Subject(s) - linearity , sampling (signal processing) , power (physics) , range (aeronautics) , electronic engineering , electrical engineering , materials science , engineering , physics , filter (signal processing) , quantum mechanics , composite material
This Letter proposes a balanced sampling switch technique for achieving high linearity and a wide temperature range. The proposed technique reduces the V DS of the NMOS sampling switch for reducing the leakage current through the switch during the hold mode. This operation is implemented by a mini capacitive digital‐to‐analogue converter (C‐DAC) that mimics the main C‐DAC used for main SAR conversion. The proposed sampling switch is applied to a 10‐bit, 0.5 V SAR ADC with 5 Msample/s and verified by comprehensive simulation. Compared to the conventional sampling switch without the mini C‐DAC, the proposed switch improves SFDR and SNDR by 27.52 dBc and 11.8 dB, respectively, at the FF corner and 120°C.