Open AccessSecure memristor replicator architecture with physical uncloneability
Author(s) -
Yang X.,
Khandelwal S.,
Jabir A.
Publication year - 2019
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2019.1538
Subject(s) - memristor , computer science , architecture , replication (statistics) , resistive random access memory , power (physics) , simple (philosophy) , electronic engineering , process (computing) , voltage , computer architecture , electrical engineering , engineering , mathematics , physics , art , philosophy , statistics , epistemology , quantum mechanics , visual arts , operating system
A lightweight and highly versatile architecture for replicating the resistance of a source memristor into a destination memristor is presented. This can be useful for storing or backing up sensed analogue information, e.g. sensed resistance, voltage, etc. in a single memristor. The architecture, which is simple and power efficient, is also able to produce non‐linear digital codes during the replication process for added security by taking advantage of the non‐linear behaviour of memristors. The generated codes can also be used to retrieve the analogue value within acceptable conversion errors, with circuit elements already built into the replicator. The authors also show that the architecture demonstrates physical uncloneable properties.