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212‐Gbit/s 2:1 multiplexing selector realised in InP DHBT
Author(s) -
Konczykowska A.,
Jorge F.,
Riet M.,
Nodjiadjim V.,
Duval B.,
Mardoyan H.,
Estaran J.M.,
Adamiecki A.,
Raybon G.,
Dupuy J.Y.
Publication year - 2019
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2018.7545
Subject(s) - gigabit , multiplexing , optoelectronics , electrical engineering , indium phosphide , electronic engineering , materials science , telecommunications , computer science , engineering , gallium arsenide
In this Letter, the authors report on the design, optimisation and electrical measurements of a new fully integrated multiplexing selector fabricated in 0.7‐µm indium phosphide (InP) double‐heterojunction bipolar transistor technology. All parts of the circuit were optimised to obtain 200‐Gbit/s class of operation. They present electrical performances at 140 and to a record speed of 212 Gbit/s, highlighting their respective measurement challenges. The power consumption of the circuit is 0.5 and 0.8 W for a differential output amplitude of 240 and 730 mV, respectively. This selector has been successfully used as modulator driver in optical transmission experiments up to 204 Gbit/s.

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