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Chaos assisted variable bit steganography in transform domain
Author(s) -
Dhivya R.,
Padmapriya V.,
Sundararaman R.,
Rayappan J.B.B.,
Amirtharajan R.
Publication year - 2018
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2018.6426
Subject(s) - chaotic , steganography , cover (algebra) , key (lock) , algorithm , mathematics , chaos (operating system) , sine , variable (mathematics) , computer science , wavelet transform , integer (computer science) , binary number , information hiding , theoretical computer science , image (mathematics) , wavelet , arithmetic , artificial intelligence , computer security , engineering , mathematical analysis , mechanical engineering , geometry , programming language
An efficient variable bit data hiding scheme based on combined chaotic system (CCS) and integer wavelet transform (IWT) is proposed. With the aim to maximise the security level, CCS is developed by combining two 1D chaotic maps. The developed combined tent‐logistic (CTL), combined sine‐logistic (CSL) and combined sine‐tent (CST) maps with improved chaotic behaviour are utilised to generate the key sequences. These chaotic key sequences from CTL, CSL and CST are then quantised to embed the secret bits in high‐high, high‐low and low‐high sub‐bands of the IWT transformed cover image, respectively. The main advantage of this scheme is that the number of bits to be embedded in each and every sub‐band coefficients is highly chaotic and extremely sensitive to the initial seeds.

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