
Node‐sharing low‐temperature poly silicon TFT shift register without bootstrapping degradation for narrow bezel displays
Author(s) -
Kim Y.,
Park S.J.,
Nam H.
Publication year - 2018
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2018.5863
Subject(s) - thin film transistor , degradation (telecommunications) , materials science , capacitor , node (physics) , bootstrapping (finance) , transistor , optoelectronics , shift register , silicon , computer science , electrical engineering , electronic circuit , voltage , engineering , telecommunications , nanotechnology , structural engineering , layer (electronics) , financial economics , economics
A small area shift register for narrow bezel display applications is demonstrated. The proposed circuit achieves the substantial reduction on the number of thin film transistors (TFTs) by sharing pull‐up as well as pull‐down nodes over multiple output pulses. In addition, there is no bootstrapping degradation caused by additional capacitors of pull‐up TFTs due to separating TFTs between pull‐up nodes. For four outputs per stage, the number of TFTs is reduced to 53%. The simulation results with low‐temperature poly silicon TFTs ensure that all pull‐up nodes of the proposed shift register with separating TFTs are boosted by larger than 12 V without any degradation.