Open AccessLow‐noise dynamic comparator circuit with selectable input‐referred thermal noise voltage
Author(s) -
Yazid M.
Publication year - 2018
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2018.5484
Subject(s) - comparator , noise (video) , electronic engineering , effective input noise temperature , capacitance , noise generator , electrical engineering , computer science , circuit extraction , voltage , cmos , equivalent circuit , noise figure , engineering , physics , amplifier , electrode , quantum mechanics , artificial intelligence , image (mathematics)
A new method for reducing input‐referred thermal noise of dynamic comparator circuit without increasing load capacitance as commonly used in the conventional method is proposed. An implementation circuit with selectable low‐noise mode operation is presented, which enable both low‐noise mode and standard mode operation by a single circuit. Simulation in 180 nm CMOS process technology shows that the proposed new method and circuit topology can achieve up to 90% increase in gain of comparator first stage, resulting in up to 40% decrease in input‐referred thermal noise voltage, compared with a conventional circuit with similar load capacitance. The proposed circuit is also able to operate with similar performance as the conventional circuit when low‐noise mode operation is not necessary.