Open Access28 GHz common‐leg T/R IC in 65 nm CMOS technology
Author(s) -
Kim J.,
Park J.,
Kim J.G.
Publication year - 2018
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2018.0593
Subject(s) - attenuator (electronics) , cmos , electrical engineering , phase shift module , common mode signal , amplifier , physics , amplitude , integrated circuit , attenuation , electronic engineering , insertion loss , engineering , optics , digital signal processing , analog signal
A 28 GHz T/R integrated circuit (IC) using common‐leg circuit in 65 nm CMOS technology is presented. The proposed common‐leg T/R IC is composed of single pole double throw (SPDT) and double pole double throw (DBDT) switches, 5‐bit phase shifter, and 5‐bit attenuator, uni‐directional amplifiers for the transmit and receive modes. The measured gains for the transmit and receive modes are 3.5 and 1 dB at 26–30 GHz, respectively. The design provides full phase control range of 360° with least significant bit (LSB) of 11.25°, and attenuation control range of 23 dB with LSB of 1 dB. The proposed common‐leg T/R IC has the maximum RMS phase error of 7°, and amplitude error of 0.6 dB at 26–30 GHz. The saturated output power for the transmit mode is 0 dBm, and the input P1dB for the receive mode is −20 dBm at 28 GHz. The chip core size is 1.3 × 0.8 mm 2 . The DC current is 130 mA for the transmit mode and 98 mA for the receive mode at 2.5 V supply voltage.