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Effective hardware implementation of Volterra filters based on reduced‐rank approaches
Author(s) -
Oliveira F.D.R.,
Batista E.L.O.,
Seara R.
Publication year - 2018
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2017.4776
Subject(s) - implementation , rank (graph theory) , computer science , reduction (mathematics) , metric (unit) , computational complexity theory , focus (optics) , computer engineering , floating point , point (geometry) , word (group theory) , algorithm , arithmetic , mathematics , programming language , engineering , operations management , physics , geometry , optics , combinatorics
The focus of this Letter is on the development of a new effective approach for the hardware implementation of Volterra filters. The proposed approach is based on exploiting the different significance levels of the branches in a reduced‐rank Volterra implementation aiming to reduce the complexity required for implementing each branch. In this Letter, the probability of overflow is used as a metric to define individual word lengths for the fixed‐point implementation of each branch. Experimental results corroborate the capability of the proposed approach for obtaining precise implementations with considerable reduction in computational complexity.

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