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V aq ‐based tri‐level switching scheme for SAR ADC
Author(s) -
Zhao Jinqiang,
Mei Niansong,
Zhang Zhaofeng,
Meng Lingqin
Publication year - 2018
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2017.3711
Subject(s) - successive approximation adc , capacitor , converters , scheme (mathematics) , voltage , shaping , voltage reference , electronic engineering , computer science , mathematics , electrical engineering , engineering , mathematical analysis
An area‐efficient tri‐level switching scheme is proposed for the successive approximation register (SAR) analogue‐to‐digital converters (ADCs). Unlike existing tri‐level scheme, the proposed switching scheme is based on a new third reference voltage V aq which is a quarter of the reference voltage V ref . With reusing the least significant bit capacitors in the last two bits generation, the proposed switching scheme achieves 87.5% less number of unit capacitors and 96.48% less switching energy over the conventional scheme.

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