z-logo
open-access-imgOpen Access
On‐chip dual‐phase charge‐transfer relaxation oscillator with comparator offset cancellation
Author(s) -
Ma Yanzhao,
Cui Kai,
Fang Song,
Fan Xiaoya
Publication year - 2018
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2017.3558
Subject(s) - comparator , relaxation oscillator , offset (computer science) , chip , cmos , materials science , electrical engineering , voltage , optoelectronics , phase noise , electronic engineering , voltage controlled oscillator , engineering , computer science , programming language
An on‐chip 23 kHz dual‐phase relaxation oscillator is presented. Charge‐transfer and comparator offset cancellation techniques have been proposed to achieve low power and high temperature stability. The circuit has been designed with 0.18 μm CMOS process. The oscillator has achieved an ultra‐low power of 130 nW, a supply voltage sensitivity of 0.8%/V over 1.2–1.8 V, and a temperature coefficient of 30 ppm/°C over − 40 to 80 ∘ C .

The content you want is available to Zendy users.

Already have an account? Click here to sign in.
Having issues? You can contact us here