
Output current enhanced cyclic switched‐capacitor step‐down DC–DC regulator
Author(s) -
Wang W.L.,
Lin H.,
Yu C.L.,
Henrickson L.E.
Publication year - 2018
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2017.3535
Subject(s) - capacitor , switched capacitor , capacitance , low dropout regulator , voltage , topology (electrical circuits) , electrical engineering , cmos , voltage regulator , materials science , regulator , power (physics) , control theory (sociology) , electronic engineering , physics , engineering , computer science , dropout voltage , electrode , chemistry , biochemistry , control (management) , quantum mechanics , artificial intelligence , gene
Here, we propose a three‐phase cyclic switched‐capacitor step‐down DC–DC regulator, which enhances output current while using the same total flying capacitance and keeping the same ideal power conversion efficiency as the conventional topology. Dual output voltages of 1.5 and 3.0 V using conversion ratios of 1/3 and 2/3 are obtained with a 5 V input voltage. The theoretical normalised output current ( I norm ) is 33% higher than that of the conventional topology. The measured I norm reaches 0.428 A/(F ·Hz) with 1 nF on‐chip flying capacitors ( C f ) at a switching frequency ( f ) of 20.8 MHz using 0.25 μm CMOS technology.