Open AccessQD floating gate NVRAM using QD channel for faster erasing
Author(s) -
Lingalugari M.,
Chan P.Y.,
Heller E.K.,
Chandy J.,
Jain F.C.
Publication year - 2018
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2017.2931
Subject(s) - optoelectronics , materials science , cmos , fabrication , channel (broadcasting) , voltage , logic gate , electrical engineering , engineering , medicine , alternative medicine , pathology
A new pathway to design floating gate quantum dot (QD) non‐volatile RAM (QDNVRAM) cells that possess high‐speed low‐voltage Erase capabilities not possible with conventional floating gate NV memories is presented. This is achieved by directly accessing the QD floating gate layer with an additional drain (D2) during the Erase operation. Experimental data on fabricated long‐channel (10 μm/14 μm) QDNVRAM cell shows ‘Erase’ pulse duration of ∼4 μs at voltage of about 10 V using drain D2 which is over two‐order smaller than the ‘Write’ pulse value. Quantum mechanical simulations are also presented. QDNVRAM fabrication process is compatible with CMOS processing.