
Breakdown and optical response of CMOS perimeter gated single‐photon avalanche diodes
Author(s) -
Habib M.H.U.,
McFarlane N.
Publication year - 2017
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2017.2485
Subject(s) - avalanche diode , breakdown voltage , avalanche breakdown , single photon avalanche diode , optoelectronics , diode , materials science , zener diode , voltage , cmos , electric field , pin diode , optics , avalanche photodiode , electrical engineering , engineering , physics , detector , transistor , quantum mechanics
The breakdown and optical response of perimeter gated single‐photon avalanche diodes fabricated in a standard 0.5 μm 2‐poly 3‐metal CMOS process is presented. These diodes prevent premature edge breakdown through the addition of a polysilicon gate. The fabricated devices feature varying size, shape (square, octagonal, and circular), and junction types (nwell‐p + and psub‐nwell) with a perimeter gate located on top of the junction. Voltage applied to the gate modulates the electric field and its effect on the breakdown voltage and optical response is discussed. Experimental results are supported by physical device simulations where applicable.