Open AccessDynamic current mode logic based flip‐flop design for robust and low‐power security integrated circuits
Author(s) -
Shen Jizhong,
Geng Liang,
Zhang Fan
Publication year - 2017
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2017.2415
Subject(s) - flip flop , computer science , electronic engineering , logic gate , current mode logic , electronic circuit , pass transistor logic , side channel attack , power (physics) , cmos , electrical engineering , engineering , digital electronics , algorithm , cryptography , physics , quantum mechanics
Side‐channel analysis (SCA) is a powerful technique to reveal the secrets using detectable physical leakages from logic elements, which brings severe security threats to modern circuits. To alleviate this problem, applying cell‐level countermeasure is usually a suitable solution, which is mainly implemented as dual‐rail precharge logic. Mace et al. has the proposed dynamic current mode logic (DyCML) scheme as a novel technology to resist SCA, whose power consumption is constant regardless of the data processed. However, the DyCML‐based sequential elements are still in blank field. So, we have implemented a novel flip‐flop compatible with DyCML, whose enhanced security has been proved by corresponding simulations.