Open AccessEnergy‐efficient higher‐side‐reset‐and‐set switching scheme for SAR ADC
Author(s) -
Zhang Hongshuai,
Zhang Hong,
Zhang Ruizhi
Publication year - 2017
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2017.2186
Subject(s) - reset (finance) , successive approximation adc , energy (signal processing) , shaping , scheme (mathematics) , capacitance , reduction (mathematics) , computer science , set (abstract data type) , electronic engineering , control theory (sociology) , capacitor , mathematics , electrical engineering , voltage , engineering , artificial intelligence , physics , mathematical analysis , statistics , geometry , electrode , quantum mechanics , financial economics , economics , programming language , control (management)
A high energy‐efficiency higher‐side‐reset‐and‐set (HSRS) switching scheme for a successive approximation register (SAR) ADC is presented, which consumes zero switching energy for the decision of the first two most significant bits without using any auxiliary circuit. The proposed HSRS scheme achieves 92.2% savings in switching energy and 50% reduction in total capacitance compared with a conventional SAR.