Optimised CORDIC‐based atan2 computation for FPGA implementations
Author(s) -
Torres V.,
Valls J.,
Canet M.J.
Publication year - 2017
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2017.2090
Subject(s) - cordic , field programmable gate array , implementation , computation , computer science , parallel computing , computer architecture , embedded system , computer hardware , algorithm , programming language
A method for the implementation of the atan2 operator based on the coordinate rotation digital computer algorithm is described. In the proposal, the computation of the z ‐path takes advantage of the look‐up table‐based FPGA resources to reduce by between 17 and 25%, without performance deterioration, the overall area of the unrolled architecture.
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