Open AccessTwo modified SVPWM algorithms for common‐mode voltage reduction in eight‐switch three‐phase inverters
Author(s) -
Liu YongChao,
Ge Xinglai,
Tang Qidi,
Gou Bin
Publication year - 2017
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2017.0678
Subject(s) - inverter , space vector , reduction (mathematics) , pulse width modulation , algorithm , common mode signal , voltage , topology (electrical circuits) , fault (geology) , control theory (sociology) , point (geometry) , computer science , phase (matter) , modulation (music) , mathematics , electronic engineering , engineering , physics , electrical engineering , artificial intelligence , geometry , control (management) , digital signal processing , seismology , geology , quantum mechanics , analog signal , acoustics , combinatorics
The relationship between common‐mode voltages (CMVs) and switching states in the post‐fault reconfigured topology of the three‐level neutral‐point‐clamped inverter with open‐circuit fault in a leg, which is named eight‐switch three‐phase inverter (ESTPI), is revealed, and based on that, two modified space vector pulse‐width modulation (M‐SVPWM) algorithms for the CMV reduction in the ESTPI are proposed. The maximum CMV of the ESTPI with two proposed M‐SVPWM algorithms is only half of that with two conventional SVPWM algorithms. Experimental results have shown the effectiveness of two proposed M‐SVPWM algorithms.