
Time‐shifted excess loop delay compensation DAC for 2‐ T s delay in CT‐ΔΣ ADCs
Author(s) -
Han C.,
Maghari N.
Publication year - 2017
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2017.0628
Subject(s) - compensation (psychology) , delta sigma modulation , loop (graph theory) , control theory (sociology) , computer science , electronic engineering , mathematics , engineering , telecommunications , bandwidth (computing) , psychology , control (management) , combinatorics , artificial intelligence , psychoanalysis
This Letter proposes a new two‐sample excess loop delay compensation in continuous‐time delta‐sigma modulators using time‐shifted differentiated digital‐to‐analogue converter (DAC). This is done by using the information inherently available but ignored in the conventional methods, and therefore no additional hardware is required. Simulation results and mathematical analysis are provided to verify the effectiveness of the proposed structure.