Open AccessPower‐jitter trade‐off analysis in digital‐to‐time converters
Author(s) -
Santiccioli A.,
Samori C.,
Lacaita A.L.,
Levantino S.
Publication year - 2017
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2016.4577
Subject(s) - jitter , converters , cmos , electronic engineering , current mode logic , time domain , computer science , power (physics) , electrical engineering , voltage , engineering , physics , computer vision , quantum mechanics
Digital‐to‐time converters are one of the main building blocks in time‐domain signal processing. The jitter‐power product is analysed and shown to scale up linearly as the full‐scale delay range in current‐mode logic implementations, and quadratically in CMOS logic. It is also shown that CMOS converters outperforms current‐mode ones only when their output range is lower than about 1.4 times the clock period.