Open Access
Back‐gate current neutralisation feedback loop for high‐input impedance neural FEAs
Author(s) -
Zhou Z.,
Warr P.A.
Publication year - 2016
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2016.2178
Subject(s) - electronic engineering , input impedance , amplifier , feedback loop , signal (programming language) , output impedance , electrical impedance , high impedance , detector , engineering , operational amplifier , electrical engineering , computer science , cmos , computer security , programming language
The front‐end amplifier (FEA) for neural signal applications forms the critical element for signal detection and pre‐processing, which determines not only the fidelity of the biosignal, but also impacts power consumption and detector size. A back‐gate current neutralisation feedback technique is proposed to compensate for input leakage currents generated by low‐noise amplifiers alongside signal leakage into the input bias network when in integrated circuit (IC) form. Significantly, this topology ensures the FEA maintains a high‐input impedance across the wide range of manufacturing and operational variations seen in ICs.