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Thermal noise limit for time‐domain analogue signal processing in CMOS technologies
Author(s) -
Pathan A.,
Liscidini A.
Publication year - 2016
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2016.1908
Subject(s) - cmos , electronic engineering , signal processing , noise (video) , signal (programming language) , limit (mathematics) , time domain , voltage , electrical engineering , computer science , engineering , digital signal processing , mathematics , artificial intelligence , mathematical analysis , image (mathematics) , computer vision , programming language
The impact of thermal noise in voltage‐ and time‐domain analogue signal processing is discussed. Despite the technology scaling allows to resolve smaller time differences, it will be shown that in CMOS technologies voltage signal processing have a better fundamental limit compared with its time counterpart.

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