Open AccessExperimental verification of on‐chip CMOS fractional‐order capacitor emulators
Author(s) -
Tsirimokou G.,
Psychalinos C.,
Elwakil A.S.,
Salama K.N.
Publication year - 2016
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2016.1457
Subject(s) - capacitor , cmos , microsystem , chip , electronic engineering , capacitance , fractional bandwidth , electrical engineering , materials science , engineering , voltage , physics , nanotechnology , band pass filter , electrode , quantum mechanics
The experimental results from a fabricated integrated circuit of fractional‐order capacitor emulators are reported. The chip contains emulators of capacitors of orders 0.3, 0.4, 0.5, 0.6 and 0.7 with nano‐Farad pseudo‐capacitances that can be adjusted through a bias current. Two off‐chip capacitors are used to set the bandwidth of each emulator independently. The chip was designed in Austria microsystems (AMS) 0.35μ CMOS.