Open AccessDesign of controllable diode PL
Author(s) -
Qi Tian,
He Songbai
Publication year - 2016
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2016.1174
Subject(s) - limiter , dbm , diode , bandwidth (computing) , voltage , materials science , biasing , insertion loss , power (physics) , optoelectronics , limit (mathematics) , pin diode , electrical engineering , electronic engineering , engineering , physics , mathematics , telecommunications , amplifier , quantum mechanics , mathematical analysis , cmos
A design of controllable power limiter (CPL) using parallel reverse polarities Schotty diode is introduced. The main characteristic of the proposed PL are controllable, be difference with traditional PLs, the turning point is controllable and depend on the applied bias voltages on the diodes. For verification, a CPL using symmetry structure, with two controllable bias voltages, operating range from 1.9 to 2.7 GHz is fabricated. The measured results proved the feasibility of design, with <3 dB small signal insertion loss during the whole bandwidth the PL can limit output power at the level under 12 dBm while the large input power ranges over 30 dBm.