Open AccessComparator offset calibration using unbalanced clocks for high speed and high power efficiency
Author(s) -
Wood Chiang Shiuhhua
Publication year - 2016
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2016.1157
Subject(s) - comparator , trimming , offset (computer science) , comparator applications , calibration , electronic engineering , noise (video) , computer science , power (physics) , engineering , electrical engineering , mathematics , physics , voltage , artificial intelligence , quantum mechanics , image (mathematics) , programming language , operating system , statistics
A novel comparator offset calibration using unbalanced clocks is proposed. The new technique avoids loading the comparator core with trimming elements, thus maximising the comparator speed and power efficiency. Simulations show that a comparator utilising the proposed calibration achieves near‐native speed and noise performance. It also achieves superior energy‐delay‐noise product over comparators with conventional calibrations.