Open AccessNon‐linear MLE‐based digital equaliser for ADC‐based backplane receivers
Author(s) -
Chung H.
Publication year - 2016
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2016.1109
Subject(s) - equaliser , backplane , bit error rate , computer science , electronic engineering , finite impulse response , successive approximation adc , equalization (audio) , adder , algorithm , decoding methods , engineering , computer hardware , electrical engineering , voltage , capacitor , cmos
Analogue‐to‐digital‐converter‐based (ADC‐based) backplane receivers have been widely studied in recent years as ever‐increasing data rate calls for strong equalisation. However, despite their ability to support various types of digital equalisation techniques, most receivers rely on linear finite‐impulse‐response‐filter‐based (FIR‐filter‐based) equalisers that are susceptible to quantisation error of the front‐end ADC. This Letter proposes a non‐linear maximum‐likelihood‐estimation‐based (MLE‐based) equaliser that utilises channel output distribution and probability theory to make bit decisions. The proposed non‐linear algorithm achieves robust performance against quantisation noise of the front‐end ADC. Moreover, a feed‐forward equaliser can be implemented without involving multi‐bit multipliers and adders that cause serious hardware complexity overhead. Simulation results suggest that the proposed MLE‐based equaliser can improve bit error rate (BER) by 10 10 times with a 5‐bit front‐end ADC and save front‐end ADC bit resolution by more than 0.8 bits with BER of 10 −15 , when compared with the conventional FIR‐filter‐based equaliser.