
Two‐step reset method for energy‐efficient SAR ADC switching schemes
Author(s) -
Osipov D.,
Paul St.
Publication year - 2016
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2016.0890
Subject(s) - reset (finance) , successive approximation adc , capacitor , energy (signal processing) , computer science , energy consumption , shaping , electronic engineering , control theory (sociology) , voltage , mathematics , electrical engineering , engineering , statistics , control (management) , artificial intelligence , financial economics , economics
The impact of the reset energy on the overall energy efficiency of an successive‐approximation register (SAR) ADC is examined for some recently reported switching schemes. The reset energy can several times exceed the switching energy drawn from the reference during conversion. The simple method based on the optimal capacitor charging is proposed. By utilising of two‐step switching during the reset phase, the total energy consumption of the DAC's capacitive matrix can be decreased by ∼20%.