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Improved self‐blocking flip‐flop design
Author(s) -
Xu Daiguo,
Xu Shiliu,
Wang Yuxin
Publication year - 2016
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2016.0836
Subject(s) - flip flop , blocking (statistics) , capacitance , electronic engineering , transistor , computer science , power (physics) , electrical engineering , engineering , voltage , cmos , physics , computer network , electrode , quantum mechanics
An improved self‐blocking flip‐flop design is proposed. With smaller clock load and simpler structure, the proposed design is compared with previous flip‐flop structures. In the same size of input/output transistors and load capacitance, the proposed structure shows a better performance in speed improvement and power saving by simulation.

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