Open AccessComments on and corrections to ‘unified VLSI architecture for photo core transform used in JPEG XR’
Author(s) -
Do Trang T.T.,
Nguyen Binh P.
Publication year - 2016
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2015.2869
Subject(s) - jpeg , very large scale integration , computer science , architecture , dataflow , discrete cosine transform , transform coding , core (optical fiber) , arithmetic , computer hardware , computer engineering , theoretical computer science , algorithm , embedded system , image (mathematics) , parallel computing , mathematics , data compression , artificial intelligence , telecommunications , art , visual arts
In the Letter ‘Unified VLSI architecture for photo core transform used in JPEG XR’, the authors proposed a hardware architecture to implement the three elementary 2 × 2 transform operations for the photo core transform used in JPEG XR. However, there are some errors in their implementation, dataflow and reported resources used. In this Letter, we point out those errors and suggest the corresponding corrections. We also provide constant additions which must be added to the results of the implementation to conform the standard.