Open AccessStability improvement of amorphous InGaZnO TFTs by an asymmetric design
Author(s) -
Hsu ChihChieh,
Wu ChienHsun,
Ting WeiChieh
Publication year - 2015
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2015.2036
Subject(s) - thin film transistor , threshold voltage , materials science , amorphous solid , optoelectronics , swing , stress (linguistics) , transistor , voltage , electrical engineering , composite material , crystallography , engineering , chemistry , mechanical engineering , linguistics , philosophy , layer (electronics)
In this reported work, amorphous InGaZnO thin film transistors (TFTs) with symmetric and asymmetric structures are fabricated. A constant positive gate bias for a time of 1–5 × 10 4 s was then applied to the TFTs to investigate their performance variation. The mobilities of the TFTs were not significantly degraded by a long stress time of 5 × 10 4 s. Also, decreases of sub‐threshold swing and off‐state current were observed for a stress time of 10 4 s. Although significant threshold voltage variation was found for the a‐IGZO TFT with a symmetric design during the stress test, it could be reduced by 56% for the TFT fabricated by the proposed asymmetric design.