
Demonstrating 1 nm‐oxide‐equivalent‐thickness La 2 O 3 and HfO 2 multi‐layer composite oxides on In 0.53 Ga 0.47 As MOS capacitor
Author(s) -
Wu WenHao,
Lin YuehChin,
Hou TzuChing,
Lin TaiWei,
Hsu HisangHua,
Wong YuenYee,
Iwai Hiroshi,
Kakushima Kuniyuki,
Chang Edward Yi
Publication year - 2016
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2015.1087
Subject(s) - materials science , equivalent oxide thickness , dielectric , x ray photoelectron spectroscopy , oxide , annealing (glass) , composite number , atomic layer deposition , lanthanum oxide , gate dielectric , hysteresis , analytical chemistry (journal) , capacitor , high κ dielectric , layer (electronics) , optoelectronics , gate oxide , nanotechnology , composite material , nuclear magnetic resonance , electrical engineering , transistor , metallurgy , condensed matter physics , chemistry , voltage , physics , chromatography , engineering
The use of a high k composite dielectric composed of La 2 O 3 and HfO 2 layers as the gate dielectric for In 0.53 Ga 0.47 As MOS application is proposed. Two multi‐layer structures of La 2 O 3 (1 nm)/HfO 2 (1 nm) and La 2 O 3 (0.5 nm)/HfO 2 (0.5 nm) were deposited and annealed at 450 and 500°C for device performance comparison. X‐ray photoelectron spectroscopy, TEM and C – V measurements were used for the interface analysis between the oxide and the semiconductor. Finally, a 1 nm equivalent‐oxide‐thickness dielectric with small hysteresis of 88 mV and D it of 1.9 × 10 12 cm −2 eV −1 was achieved for six layers of an La 2 O 3 (0.5 nm)/HfO 2 (0.5 nm) composite oxide structure on an In 0.53 Ga 0.47 As MOS capacitor with a post‐deposition annealing temperature of 450°C.