Open AccessDigital excess loop delay compensation for high speed delta–sigma modulators
Author(s) -
Jabbour C.,
Nguyen V.T.,
Srini V.,
Aggarwal S.
Publication year - 2015
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2015.0949
Subject(s) - delta sigma modulation , control theory (sociology) , compensation (psychology) , loop (graph theory) , sigma , electronic engineering , feedback loop , computer science , physics , engineering , mathematics , telecommunications , bandwidth (computing) , psychology , control (management) , computer security , combinatorics , quantum mechanics , artificial intelligence , psychoanalysis
A digital excess loop delay (ELD) compensation suited for high speed delta–sigma modulators is presented. Its operation is based on computing the digital outputs for all the possible values of the ELD compensation feedback and performing the selection in the digital domain. The proposed technique also uses a novel comparator sharing approach which minimises the number of comparators needed in the quantiser.