Open AccessComparative study of LDPC coding schemes and FPGA implementation for inter‐vehicle communications
Author(s) -
Kiokes G.,
Zountouridou E.
Publication year - 2015
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2015.0838
Subject(s) - low density parity check code , field programmable gate array , computer science , decoding methods , coding (social sciences) , keying , wireless , algorithm , phase shift keying , gate array , key (lock) , binary number , belief propagation , coding gain , computer engineering , computer hardware , bit error rate , telecommunications , mathematics , arithmetic , statistics , computer security
A novel comparative study of different low‐density parity‐check (LDPC) coding algorithms and implementation issues through field‐programmable gate arrays (FPGAs) technology for wireless vehicular applications is presented. A key development in LDPC codes is the iterative decoding algorithm which uses the belief propagation algorithm. A comprehensive investigation of the performance of different coding schemes was carried out. Four different decoding techniques were tested by computer‐based simulations of messages modulated under the binary phase‐shift keying modulation scheme and transmitted through a vehicular channel model. Finally, the best performance ratio against complexity algorithm was chosen to be implemented on a Xilinx FPGA platform.