Open AccessLow‐voltage power‐on‐reset circuit with least delay and high accuracy
Author(s) -
Pandey P.
Publication year - 2015
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2014.4203
Subject(s) - reset (finance) , bandgap voltage reference , computer science , power (physics) , voltage , signal (programming language) , limit (mathematics) , electronic engineering , voltage reference , control theory (sociology) , electrical engineering , engineering , mathematics , physics , control (management) , quantum mechanics , financial economics , economics , mathematical analysis , programming language , artificial intelligence , dropout voltage
A novel method for the generation of the power‐on‐reset (POR) signal needed by the SOC is described. A POR signal is required for initialisation of the logical state in digital systems. To obtain an accurate trip point for the POR, generally a bandgap voltage reference is used along with additional logic. Such logic tends to limit the lowest possible trip point that can be achieved. The proposed implementation of POR is based on a modified bandgap circuit where a supply‐dependent current is injected into the loop. In this case, the reference generation is not explicitly required and thus the trip point can be kept very close to the minimum supply required for the bandgap operation. This implementation also needs very small delay as the required delay is not dependent on supply ramp rates and can be made very small.