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Unified VLSI architecture for photo core transform used in JPEG XR
Author(s) -
Zhang Shuiping,
Tian Xin,
Xiong Chengyi,
Tian Jinwe
Publication year - 2015
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2014.3861
Subject(s) - very large scale integration , field programmable gate array , jpeg , computer science , embedded system , architecture , critical path method , computer hardware , computer architecture , data compression , engineering , artificial intelligence , art , systems engineering , visual arts
A unified very large‐scale integration (VLSI) architecture with butterflies that can perform photo core transform (PCT) in JPEG XR image compression is presented. The proposed architecture can achieve the unified architecture design, which supports the three elemental operations of PCT, and it has the characteristics of lower hardware cost, shorter critical path, lower power consumption, more efficient hardware utilisation and regular structure for VLSI implementation. Finally, the implementation on Altera field programmable gate array (FPGA) devices validates the effectiveness of the design.

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