Open AccessEfficient error detection in multiple way tables
Author(s) -
Reviriego P.,
Maestro J.A.
Publication year - 2015
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2014.3769
Subject(s) - parity bit , computer science , error detection and correction , arithmetic , hash function , bit (key) , cache , table (database) , hash table , algorithm , parallel computing , computer hardware , programming language , data mining , computer network , mathematics
Multiple way tables in which items can be placed on several buckets are used in many computing applications. Some examples are cache memories and multiple hash tables structures. In most cases, the items are stored in electronic memories that are prone to soft errors that can corrupt the stored items. To avoid data corruption, memories can be protected with a parity bit or with an error correction code. It is shown that most single bit errors can be detected in multiple way tables without adding a parity bit. This can be done by placing the items in a predetermined order in the multiple ways of the table.