
Digital bilinear feedback for low‐power double‐sampling sigma–delta modulators
Author(s) -
De Bock M.,
Rombouts P.
Publication year - 2015
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
ISSN - 1350-911X
DOI - 10.1049/el.2014.3016
Subject(s) - delta sigma modulation , sampling (signal processing) , noise shaping , electronic engineering , bilinear interpolation , feedback loop , capacitor , filter (signal processing) , computer science , path (computing) , bilinear transform , noise (video) , control theory (sociology) , digital filter , engineering , voltage , electrical engineering , cmos , computer security , control (management) , artificial intelligence , image (mathematics) , computer vision , programming language
A novel double‐sampling (DS) technique for use in sigma–delta modulators (ΣΔMs) is presented. The proposed technique uses a digital bilinear filter in the feedback path of the modulator loop. The bilinear filter suppresses the quantisation noise folding (QNF) that results from the DS path mismatch. Unlike other solutions for the QNF, the digital implementation of this filter allows the sharing of the input sampling capacitor with the feedback sampling capacitor without any additional analogue gain stages. This way, the power consumption in the input signal buffer can be greatly reduced, because it benefits from the nullator effect at the input of the ΣΔM loop, and hence the current needed to drive the shared sampling capacitor is drastically reduced. Moreover, the proposed DS technique is also suitable for a single‐ended circuit implementation of DS.