Open AccessUndershoot suppression technique for fully integrated pulse‐width modulated switching converters
Author(s) -
Huang Cheng,
Mok Philip K.T.
Publication year - 2015
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2014.2171
Subject(s) - parasitic extraction , inductor , converters , capacitor , transient response , pulse width modulation , transient (computer programming) , voltage , bandwidth (computing) , electronic engineering , cmos , materials science , electrical engineering , engineering , computer science , telecommunications , operating system
A shunt‐regulation control technique is presented to improve the load transient performance of fully integrated high‐frequency converters. The undershoot voltage, which used to be limited by the system loop response and the nanofarad range small on‐chip capacitor, is significantly suppressed. The proposed converter is simulated by a standard 0.13 μm CMOS process using a 6 nH inductor and 10 nF capacitor under different process corners with parasitics extracted from the layout of critical blocks. Compared to a conventional converter with the bandwidth pushed to the limit, the undershoot voltage is reduced from 360 to 100 mV with a transient step of 150–550 mA in 100 ps.