Open Access55 dB DC gain, robust to PVT single‐stage fully differential amplifier on 45 nm SOI‐CMOS technology
Author(s) -
Gómez H.,
Espinosa G.
Publication year - 2014
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2014.0883
Subject(s) - silicon on insulator , cmos , single stage , differential amplifier , amplifier , electrical engineering , differential (mechanical device) , optoelectronics , materials science , electronic engineering , physics , engineering , silicon , thermodynamics , aerospace engineering
The design of a single‐stage operational transconductance amplifier is presented, which uses self‐cascode transistors and current shunt stages to improve its DC gain. The proposed amplifier is implemented in a standard 45 nm silicon on insulator CMOS process. Simulation results show that the amplifier has a DC gain above 50 dB despite physical and environmental variations with a minimum gain bandwidth product of 540 MHZ and more than 55° phase margin. In addition, the simulated transient behaviour is shown to be robust, with a slew rate of 500 V/μs and a settling time of 7 ns with 1% accuracy for a C L of 0.3 pF.