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Ultra‐energy‐efficient CMOS/magnetic non‐volatile flip‐flop based on spin‐orbit torque device
Author(s) -
Jabeur K.,
Di Pendina G.,
Prenat G.
Publication year - 2014
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2014.0372
Subject(s) - flip flop , cmos , tunnel magnetoresistance , spin transfer torque , magnetoresistive random access memory , scalability , electrical engineering , torque , computer science , electronic engineering , magnetization , materials science , engineering , computer hardware , physics , random access memory , magnetic field , nanotechnology , layer (electronics) , quantum mechanics , database , thermodynamics
The spin‐orbit‐torque magnetic tunnel junction (SOT‐MTJ) is a promising device for data storage. Most of the issues encountered with scalable spin transfer‐torque (STT) devices are visibly moved. Thanks to a three‐terminal architecture, the reliability is increased by separating the read and the write paths. Furthermore, SOT‐induced magnetisation switching can be very fast, thanks to a low‐resistive writing path. The writing operation is symmetrical. Thus, it requires the same current density to switch between the parallel and antiparallel states. All these advantages make the SOT‐MTJ device an ultimate candidate for introducing non‐volatility in ultra‐fast and power‐efficient integrated circuits. A mixed CMOS/magnetic non‐volatile flip‐flop (NVFF) is described. The proposed architecture offers the possibility to use the usual CMOS flip‐flop functionality with possible magnetic data store and restore operations while keeping non‐volatility when the circuit is powered off. With a 135 nm dimension, the SOT‐MTJ‐based NVFF demonstrated a very high switching with a 5× decrease in terms of writing energy/bit when compared with an STT device.

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