Open AccessAnomalous drain‐induced barrier lowering effect of thin‐film transistors due to capacitive coupling voltage of light‐shield metal
Author(s) -
Kim Miryeon,
Shin Hyungsoon
Publication year - 2014
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2013.3443
Subject(s) - materials science , optoelectronics , shield , coupling (piping) , capacitive coupling , transistor , voltage , metal , electrical engineering , composite material , engineering , metallurgy , petrology , geology
The anomalous drain‐induced barrier lowering (DIBL) effect of long‐channel thin‐film transistors (TFTs) with a light shield (LS) is investigated by two‐dimensional (2D) device simulation. In long‐channel TFTs with a LS, which is long enough to neglect the DIBL effect and the floating body effect, a decrease of threshold voltage ( V th ) was observed at high drain voltages. The V th lowering is due to the large potential of the LS induced by the high drain voltage, which lowers the height of the source potential barrier. It is found that the LS‐induced DIBL effect can be larger as the length of the LS increases or the thickness of the buried oxide decreases.