Open AccessEnergy‐efficient hybrid capacitor switching scheme for SAR ADC
Author(s) -
Xie Liangbo,
Wen Guangjun,
Liu Jiaxin,
Wang Yao
Publication year - 2014
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2013.2794
Subject(s) - successive approximation adc , capacitor , energy (signal processing) , computer science , energy consumption , electronic engineering , scheme (mathematics) , monotonic function , power (physics) , electrical engineering , voltage , mathematics , engineering , physics , mathematical analysis , quantum mechanics , statistics
A novel low‐energy hybrid capacitor switching scheme for a low‐power successive approximation register (SAR) analogue‐to‐digital converter (ADC) is presented. The proposed switching scheme combines a new switch method and the monotonic technique. The new switch method can achieve no switching energy consumption in the first three comparison cycles. Furthermore, a low‐energy monotonic procedure is performed for the rest of the comparisons. The average switching energy is reduced by 98.83% compared with the conventional architecture, resulting in the most energy‐efcient switching scheme among the existing switching techniques. Besides the significant energy saving, the proposed switching scheme also achieves a 75% reduction of the capacitors over the conventional scheme.