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Double dual slope multiplier‐cum‐divider
Author(s) -
Selvam K.C.
Publication year - 2013
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2013.2608
Subject(s) - multiplier (economics) , voltage divider , waveform , voltage , mathematics , frequency divider , square (algebra) , current divider , arithmetic , electrical engineering , engineering , power dividers and directional couplers , geometry , economics , macroeconomics
A novel type of analogue multiplier‐cum‐divider is described. A square waveform of period T which is proportional to V 2 / V 1 , where V 2 and V 1 are the two input applied voltages, is generated. Another input voltage V 3 is integrated during the period T . The peak value of the integrated output is V 2 V 3 / V 1 .

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