Open AccessTiny – optimised 3D mesh NoC for area and latency minimisation
Author(s) -
Marcon C.,
Webber T.,
Fernandes R.,
Cataldo R.,
Grando F.,
Poehls L.,
Benso A.
Publication year - 2014
Publication title -
electronics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el.2013.2557
Subject(s) - minimisation (clinical trials) , latency (audio) , computer science , computer network , embedded system , electronic engineering , engineering , telecommunications , mathematics , statistics
Tiny is a scalable and efficient three‐dimensional (3D) network‐on‐chip (NoC) designed to reduce latency and area. A theoretical analysis demonstrates its efficiency when compared with a basic 3D mesh NoC. Mapping independent traffics with different injection rates makes the trade‐offs analysis of Tiny possible. Results highlight that Tiny always reduces area and for several cases minimises latency.